This application claims priority under 35 USC 119 of Japanese Patent Application No. 2000-114914 filed on Apr. 17, 2000, the entire disclosure of which is incorporated herein by reference.
1. Field of the Invention
The present invention relates to image processing apparatus such as facsimile machines that have a power save mode for suppressing power consumption. The present invention also relates to a method of controlling such image processing apparatus.
2. Description of the Related Art
Recently many image processing machines such as facsimile machines which are widely used in offices have a power save mode to reduce power consumption when the machines are not used for a particular period of time.
Typically a conventional image processing machine divides its parts into a plurality of groups with respect to their functions, and interrupts power supply to those groups which are not in service. This is the conventional way of power saving.
A general object of the present invention is to provide an image processing apparatus that can enable power saving by another approach.
Another object of the present invention is to provide a method of controlling such image processing apparatus.
According to one aspect of the present invention, there is provided an image processing apparatus operable in a normal power supply mode and a power save mode, including at least one large scale integrated (LSI) circuit for executing image processing, a power supply unit for feeding electricity to the respective LSI circuit, and a control unit for lowering operation capability of at least one of the LSI circuits when canceling a normal power supply mode and shifting into a power save mode.
The image processing apparatus may further include an oscillator for feeding a clock signal to the respective LSI circuit, and the control unit may cause the oscillator to issue the clock signal with a lower frequency when canceling the normal power supply mode and shifting into the power save mode. By lowering the clock signal frequency, the operation capability of the LSI is degraded.
The control unit may reset the respective LSI when shifting to the power save mode. By resetting the LSI, the operation capability of the LSI is degraded.
The control unit may maintain the respective LSI circuit in a reset condition when shifting to the power save mode.
The control unit may cause the power supply unit to feed a lower voltage, including zero voltage, to the respective LSI circuit when shifting to the power save mode. By lowering the feed voltage, the operation capability of the LSI is degraded.
According to another aspect of the present invention, there is provided a method of controlling an image processing apparatus having at least one LSI circuit for image processing, including the step A of determining whether a predetermined period elapses without any operations performed in a normal power supply mode, and the step B of lowering operation capability of at least one of the LSI circuits when the step A determines that the predetermined period has elapsed without any operations performed in the normal power supply mode.
The step B may include the sub-step of lowering a frequency of a clock signal to be fed to the respective LSI circuit. The step B may include another sub-step of resetting the respective LSI circuit. The respective LSI circuit may be maintained in a reset condition. Alternatively, voltage to be fed to the respective LSI circuit may be reduced in the step B.
Additional objects, aspects and advantages of the present invention will become apparent to those skilled in the art to which the invention relates from the subsequent detailed description of the invention and appended claims taken in conjunction with the accompanying drawings.